The P2000 Microcomputer is available in two versions:
The P2000 T-version consists of one cabinet, the basic cabinet. This computer interfaces to either a standard black/white or colour television set or a special set with non-modulated R.G.B. interface. The basic cabinet includes a keyboard and minicassette drive and is equipped with a serial printer interface. Standard programs are available on ROM-cartridges which can be plugged into a slot on the cabinet. A second slot is available for installation of an optional interface adaptor, for example a modem-interface.
The P2000 M-version consists of two cabinets, the basic cabinet and the monitor cabinet. The basic cabinet includes the same functions as the T-version, but interfaces to a professional monitor in the monitor cabinet. This monitor cabinet is also the housing for up to 2 mini floppy disk drives.
The P2000 is a microcomputer system consisting of four functional groups:
The main difference between the T- and M-version of the P2000 is found in the video generation. The T-version interfaces to a standard black/white or colour television set and is controlled by logic circuitry on the CPU-board. It uses the 40 character per line colour teletext/viewdata character set. The M-version interfaces to a professional 12" monitor and is controlled by logic circuitry on a separate video board. This board generates 80 characters per line monochrome. For both versions the extension board is optional.
The CPU is a Zilog Z80 microprocessor running at 2.5 MHz. The u-processor offers a 16 bit addressbus and an 8 bit databus. Instructions are fetched via the databus. The instruction set includes a wide variety of instructions such as logical and arithmetic operations, jump and move instructions, a set of memory load and store commands and I/O instructions. During memory operations the address bus carries the specific memory address. During I/O operations the address bus carries the specific portnumber which is involved. The selection of the particular memory area and the selection of a particular I/O port is done by decoding a part of the addressbus.
The CPU is addressing a number of memory areas, each of them with a specific function.
Two more memory banks are located on the extension board. Each bank is a 16K8 area, formed out of 8 dynamic memory calls of 16K1 each. The memory extension can be used by the application to extend the storage area of the system. The upper 8K of this extension is not directly accessable and is especially used in disc systems to store part of the operating system.
The CPU controls input and output via a number of I/O ports. These I/O ports vary from a simple flip-flop, e.g. controlling the BELL, to an intelligent programmable controller circuit, e.g. the FLOPPY-CONTROLLER. The addressbus, carrying the portnumber during I/O operations of the CPU, is decoded to select the particular I/O port. Data and commands are then offered via the databus.
The keyboard is scanned every 20 ms for key suppression and via an input port the information of the suppressed key is then fetched by the CPU. The system software is taking care for the translation into a correct value according to the national version and stores the keycode in a buffer area of the system RAM.
The cassette and printer interface is also achieved via a port circuitry, controlled by routines in the monitor program. A second slot is available on the machine to insert an I/O cartridge. This allows a user to adapt other periphals to the machine with help of an interface circuitry mounted on the I/O cartridge (e.g. viewdata, parallel printer).
The control of the mini floppy disk drives is realized with help of an interface circuitry based on an intelligent floppy disk controller circuit. Data transfers between floppy and CPU are performed by CPU-scanning of the floppy controller. Service requests and failure reports are executed on an interrupt base, using the interrupt controller. The interrupt controller is formed by a programmable counter/timer circuit providing interrupt addresses for floppy and keyboard. It also provides the transmission timing for the optional data communication interface. When the extension board is not used the keyboard interrupts are generated via a circuitry on the CPU-board giving every 20ms an interrupt to scan the key matrix.
On the T-version the logic circuitry for video generation is part of the CPUboard. The circuitry offers two interfaces, one for the connection to the antenne input of a standard television set, a HF modulated signal. The other interface is provided for connection to a televisionset with RGB interface, which is directly giving the red, green and blue levels, thus improving the quality of the picture.
The screen is refreshed by regular access to the VIDEO RAM. The memory is accessed in this display mode via DMA (direct memory access), the address being offered by the video timing chain. The data is then fetched to a video generation circuit to translate the coded characters to a serial video dot pattern and decode the special control characters (e.g. COLOUR-SETTING).
The video RAM for the T-version is an area of 2K8, structured as 24 rows of 80 characters each. Only 40 characters of every row are displayed, selected via a scrolling feature under software control.
For the M-version the video generation is situated on a separate board, called the video board. It interfaces to a professional video monitor offering a screen of 24 rows of 80 characters. The display of special features such as blinking characters, inverse video and underlining of characters, is separately controlled per character. This requires a separate video memory for attributes. Thus the total video memory is formed by a 2K8 memory for characters and a 2K4 memory for attributes. During screen refresh the video information is extracted both from the character and the attribute memory, offering 12 information bits to the video generation logic. Reading out of the video memory to the video generation logic is not controlled by the CPU but is achieved via a DMA-process, activated and addressed by the video timing chain.