DP 8XXX Series
Quick Reference Guide

The figure above shows the connector, switch and jumper locations on the board.

The board is equipped wth two integrated Intel 82558 PCI fast Ethernet controllers with two RJ-45 10/100 BASE TX connectors on the mounting bracket at the rear of the board. The I/O addresses and interrupts are set by the PCI plug and play BIOS at boot time. The controllers are enabled or disabled via jumper JP1 & JP2 (see Figure above for jumper location).

JP3 - VGA

The on-board S3 video controller can be enabled or disabled in the system BIOS and via hardware with jumper JP3.

JP4 - RAID Interrupt

The board comes from the factory with JP4 in a "normal" setting (jumper on pins 1-2), unless otherwise specified. If an AMI RAID card using the internal hards drives is installed, the jumper needs to be moved to pins 2-3.

JP5 - Flash Bios

If the Flash Bios is to be upgraded, a shunt must be installed on the 2-pin jumper JP5 (see figure above for jumper location). Upgrades typically come on a floppy disc and are accompanied by upgrade instructions. When the upgrade is complete, the shunt should be removed to protect the system from accidental erasure.

Other Jumpers

Jumpers JP6, 7 , 8 & 9 (CPU Speed) are processor dependent and should not be changed from factory setting. J2 is a rest jumper on the baord for factory testing .

Symbios SCSI Controller Jumper Settings

The board is equipped with an integrated Wide Ultra2 SCSI controller (Symbios 53C895). This SCSI controller supports both LVD and Single-Ended SCSI devices*. The controller is enabled or disabled via a hardware jumper SJP2. (The "S' proceding the "JP" designates the jumper is specific to SCSI functions.)

The SCSI controller is a bus master device which gains control of the PCI bus to transfer data between the CPU memory and the SCSI devices. The I/O base address and interrupts are set by the PCI plug and play BIOS at boot time.

If the SCSI controller is ordered, a SCSI configuration utility is available on boot-up of the board. Shortly after the SCSI BIOS information displays, the configuration program can be accessed by pressing "Control C". The configuration utility will allow you to scan the SCSI bus, change configuration options and view a list of SCSI devices connected to the board.


SJP2 - Enable/Disable SCSI Controller

As stated above, the on-board Symbios Wide Ultra2 SCSI controller can be enabled or disabled with SJP2 (see Figure above for SJP2 location).

SCSI Activity LED

There is an LED located on the top edge of the board next to the internal SCSI connector. The LED will be red when the SCSI drive is busy. The LED is only visible when the cover is off the Density System

Memory Configuration & Management

• All memory is provided in 168 pin, 3.3 volt, 72 bit 100MHZ (PC100) ECC SDRAM DIMMs.
  
• DIMMs do not need to be installed in pairs, and different sizes may be mixed.
  
• DIMMs may be either registered or unbuffered. Registered and unbuffered DIMMs may not be mixed.

• DIMMs must have gold contacts (edge connectors)
  

The 16 system hardware interrupts on the SP are represented in Table 4 - 4. Interrupts are managed by two standard 8259A Programmable Interrupt Controllers (PICs). Interrupts at IRQ 0 through 7 are located on the main PIC; IRQ 8 through 15 are on the SLAVE PIC.

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