BC Triton Series
Chapter 2 - Hardware

Configurable Hardware Options

Ethernet

A DEC 21140 PCI Fast Ethernet (10/100 Mbps) controller is integrated onto each BC Triton processor. The controller can be disabled in the system BIOS. On the BC 5xxxTE, the Ethernet controller can also be disabled in hardware with a jumper (JP5).  

Reset on Loss of DCD / DSR

The BC 5xxxTE can be configured to perform a hardware reset when the Data Carrier Detect (DCD) or Data Set Ready (DSR) signal changes from true to false on the COM1 serial port. This feature is designed for use in remote communication applications where the BC 5xxxTE is used to host dial in sessions through the COM 1 Port on a network, as it forces the BC to reset after each session. The reset causes the BC hardware to return to its initial state and also prevents the next dial in user from accessing data left in memory by the previous user. This function is available on COM1 only.

Video

A hardware jumper (JP4) can be set to disable the on board S3 Trio64V+(765) video controller on the (BC 5xxxTE) only. If this controller is disabled, an external video controller with a video BIOS at address C0000 hexadecimal must be installed.

Cubix Supervisory System

The Supervisory System requires installation of an IES (Intelligent Environmental Sensor) module in each Cubix subsystem being supervised except ERS/FT II. This IES module communicates with the BC processors in the subsystem via a hardware interrupt which is configurable as IRQ 10 or IRQ 15 on each BC. Note that if the secondary IDE controller is used on the Triton Server BC, IRQ 15 is not available. If no IES is installed, configure the BC for no Cubix Supervisory interrupt. In older subsystems this interrupt should be configured for the PA 3030 supervisory processor (the PA 3030 was the predecessor to IES).

Mouse

A PS/2 style mouse port is included on each BC processor. The mouse may be connected to the BC board via a Cubix multiplexer or by installing an separate adapter. If a mouse is installed, the mouse interrupt (IRQ 12) must be enabled in the hardware configuration. The "Mouse Support Options" in the Advanced CMOS Setup section of the BIOS Setup Utilities must be "Disabled".

SCSI Termination

Termination for the SCSI cable is enabled or disabled with a hardware switch on the board. SCSI termination should be enabled when the SCSI cable terminates at the BC processor or if the SCSI interface is not used. The Symbios 825A SCSI adapter can be enabled or disabled in the system BIOS. On the BC 5xxxTE, the SCSI can also be disabled with a hardware jumper (JP6).

PCI Extension

To accomplish PCI bus extension, an optional PCI Bus Extender card may be installed on any of the BC Triton boards. Note: The only subsystem supporting PCI extension is the ERS/FT II.

Switch and Jumper Settings

The following figures show the connector, switch and jumper locations on the BC5xxxTE and BC5xxxTS. Tables 2-1 and 2-2 define the settings for switch location S1 and S2. Table 2-3 defines jumper settings for the BC 5xxxTE.

Figure 2-1, BC 5xxxTE

Figure 2-2, BC 5xxxTS

Table 2-1, S2 Switch Settings

Table 2-2, BC 5xxxTE S1 Switch Settings

Table 2-3, Jumper Settings

*Note: JP4, 5 & 6 are on BC 5xxx TE only.
JP1 and 2 are factory set and should not be changed.

I/O Connections

The headers and connectors on the BC Triton boards should be connected to the subsystem as indicated in Table 2 - 3.

When the BC Triton is installed in a Cubix ERS/FT Series II subsystem, all connections to the multiplexer are made via headers J1 and J3.

Table 2-4, Cubix Enclosure I/O Connections - BC Triton

* J17 is only available on the Triton Server (BC 5xxx TS)
** J12 is only available on the Triton Engine (BC 5xxx TE)

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