Support Home Page
Cubix Home Page
Feedback Forms

QL 3222
Quick Reference Guide


Board Layout


Connectors


J1 & J2 - IDE Hard Disk

1 ground 2 speed 3 ground
4 n/c 5 ground 6 n/c
7 ground 8 index 9 ground
10 motor on 11 ground 12 drive sel 2
13 ground 14 motor sel 1 15 ground
16 motor on 2 17 ground 18 direction
19 ground 20 stop step 21 ground
22 write data 23 ground 24 write gate
25 ground 26 track 0 27 ground
28 write protect 29 ground 30 read data
31 ground 32 side select 33 ground
34 disk change

J2 & J7 - LPT1

This header requires a optional I/O adapter from Cubix. Attempting to connect a device directly to this connector will damage the board.


J3 & J8 - COM 2

1 DCD (data carrier detect) 2 RD (receive data)
3 TD (transmit data) 4 DTR (data terminal ready)
5 GND (ground) 6 DSR (data set ready)
7 RTS (request to send) 8 CTS (clear to send)
9 RI (ring indicator)

Note: The COM2 header requires a optional I/O adapter from Cubix. Attempting to connect a serial device directly to this connector will damage the board.


J4 & J9 - Video/Kybd Mux Connector

This header is for connection to the Optional Cubix Video adapter.
1 Red 2 Ground
3 Green 4 Ground
5 Blue 6 Ground
7 Hsync 8 Ground
9 Vsync 10 mse data
11 Kclk 12 mse clk
13 Kdata 14 +5 (fused)
      

J12 & J15 - COM 1

1 DCD (data carrier detect) 2 RD (receive data)
3 TD (transmit data) 4 DTR (data terminal ready)
5 GND (ground) 6 DSR (data set ready)
7 RTS (request to send) 8 CTS (clear to send)
9 RI (ring indicator)

 


J12 - Line Busy

1 n/c 2 n/c
3 tip 4 ring
5 n/c 6 n/c

Switch Settings


SW2 - I/O and Reset Switch

I/O Address

Each QL 3222 board has a Mode Switch (DIP switch SW2). Positions 1 and 2 select the base I/O address used by the server driver to communicate with the QL 3000 processors. The QL interface requires eight consecutive I/O ports beginning with the base I/O address.

The I/O addresses selected must not be assigned to any non QL 3000 Series devices installed in the file server or bridge hosting the QL 3000 Series boards. However, all of the QL 3000 Series boards installed in this host should have the same base I/O address.

Reset on Loss of DCD or DSR

The QL 3222 is typically connected via the COM1 port to a modem performing remote communications over a telephone line. The COM1 port monitors the state of the Data Carrier Detect (DCD) or Data Set Ready (DSR) signals coming from the modem. The QL processors can be configured to perform an automatic hardware reset if DCD or DSR is dropped.

One practical usage of this feature is to force the QL processor to reset between remote sessions. This ensures users that they are connecting to a newly initialized system. It also verifies that users are properly disconnected from the network when their session terminates (i.e., a user will not remain logged into NetWare after "hanging up" the phone).

Depending upon the system configuration, either DCD or DSR will indicate that the telephone signal connection is established and that the modem is ready. Most configurations support DCD. However, if a multiplexer is installed between the QL 3222 COM1 port and the modem, it may be necessary to monitor DSR instead. Refer to the multiplexer manufacturer's documentation for this information.

The Mode Switch (DIP switch SW2) on the QL 3222 configures this feature.

Function 1 2 3 4 5 6 7
* Select Base I/O Address 220 on on         on
Select Base I/O Address 230 on off         on
Select Base I/O Address 320 off on         on
Select Base I/O Address 330 off off         on
* Proc B: Disable reset Option     off off     on
Proc B: Reset on loss of DCD     off on     on
Proc B: Reset on loss of DSR     on off     on
* Proc A: Disable reset Option         off off on
Proc A: Reset on loss of DCD         off on on
Proc A: Reset on loss of DSR         on off on
* = Factory Setting

Board Node Number

Each node on a Novell network must be identified by a unique address. This address consists of two parts: a network number and a node number. When the Cubix server driver is installed, it must be assigned a unique network number. Each QL 3000 Series node to be supported by the server driver must be assigned a unique node number. The node number is selected by the I.D. Switch (DIP switch SW1) on the QL 3222 board. Valid node numbers range from 2 to 249. It is recommended that the QL 3222 node numbers be assigned consecutively beginning with node number 2 as this will maximize network performance.

The QL 3222 board uses a seven position DIP switch to select its node numbers. Since the QL 3222 contains two nodes, these seven switches determine the seven high order bits of the address for each node. The low order bit for the Port A node is assumed to be 0, while it is assumed to be 1 for the Port B node. A switch is OFF when its handle is away from the board.

# Switch SW1 # Switch SW1 # Switch SW1
002 7 off 052 2,4,7 off 0A2 1,3,7
004 6 054 2,4,6 0A4 1,3,6
006 6,7 056 2,4,6,7 0A6 1,3,6,7
008 5 058 2,4,5 0A8 1,3,5
00A 5,7 05A 2,4,5,7 0AA 1,3,5,7
00C 5,6 05C 2,4,5,6 0AC 1,3,5,6
00E 5,6,7 05E 2,4,5,6,7 0AE 1,3,5,6,7
010 4 060 2,3 0B0 1,3,4
012 4,7 062 2,3,7 0B2 1,3,4,7
014 4,6 064 2,3,6 0B4 1,3,4,6
016 4,6,7 066 2,3,6,7 0B6 1,3,4,6,7
018 4,5 068 2,3,5 0B8 1,3,4,5
01A 4,5,7 06A 2,3,5,7 0BA 1,3,4,5,7
01C 4,5,6 06C 2,3,5,6 0BC 1,3,4,5,6
01E 4,5,6,7 06E 2,3,5,6,7 0BE 1,3,4,5,6,7
020 3 070 2,3,4 OCO 1,2
022 3,7 072 2,3,4,7 0C2 1,2,7
024 3,6 074 2,3,4,6 0C4 1,2,6
026 3,6,7 076 2,3,4,6,7 0C6 1,2,6,7
028 3,5 078 2,3,4,5 0C8 1,2,5
02A 3,5,7 07A 2,3,4,5,7 0EC 1,2,5,7
02C 3,5,6 07C 2,3,4,5,6 0CC 1,2,5,6
02E 3,5,6,7 07E 2,3,4,5,6,7 0CE 1,2,5,6,7
030 3,4 080 1 0D0 1,2,4
032 3,4,7 082 1,7 0D2 1,2,4,7
034 3,4,6 084 1,6 0D4 1,2,4,6
036 3,4,6,7 086 1,6,7 0D6 1,2,4,6,7
038 3,4,5 088 1,5 OD8 1,2,4,5
03A 3,4,5,7 08A 1,5,7 ODA 1,2,4,5,7
03C 3,4,5,6 08C 1,5,6 ODC 1,2,4,5,6
03E 3,4,5,6,7 08E 1,5,6,7 ODE 1,2,4,5,6,7
040 2 090 1,4 0E0 1,2,3
042 2,7 092 1,4,7 0E2 1,2,3,7
044 2,6 094 1,4,6 0E4 1,2,3,6
046 2,6,7 096 1,4,6,7 0E6 1,2,3,6,7
048 2,5 098 1,4,5 OE8 1,2,3,5
04A 2,5,7 09A 1,4,5,7 OEA 1,2,3,5,7
04C 2,5,6 09C 1,4,5,6 OEC 1,2,3,5,6
04E 2,5,6,7 09E 1,4,5,6,7 OEE 1,2,3,5,6,7
050 2,4 0A0 1,3 OFO 1,2,3,4

IRQ, DMA, SIMM's & Memory Map


QL 3222 SIMM Configuration

The QL 3222 is equipped with a minimum of 4 MB of RAM per processor. The QL 3222 RAM resides in standard PS/2 type 72-pin SIMM devices. If double-sided SIMM's are used, they must be TSOP (thin Small Outline Package). One SIMM may be installed per processor.


QL 3222 and QL 4222 I/0 Map

000 - 00F DMA 1
020 - 021 PIC 1
040 - 043 Timer
060, 064 8742 Keyboard controller
061 Port B
070 - 071 CMOS RAM & NMI mask register
080 Manufacturing HEX display
081 - 08F DMA Page registers
0A0 - 0A1 PIC 2
0C0 - 0DF DMA 2
1F0 - 1F7 IDE Hard disk drive
2F8 - 2FF COM2
300 - 302 QL Command/Status
378 - 37F LPT1
3B0 - 3DF VGA
3F0 - 3F7 Floppy drive (QL 4222 only)
3F8 - 3FF COM1
46E8,102 VGA configuration ports

Interrupt Channels

NMI Parity/VGA
0 Timer
1 Keyboard
2 Cascaded Input for PIC 2
3 COM 2
4 COM 1
5 QL 3222: Interrupt from File Server
QL 4222: Not Used
6 QL 3222: Interrupt from File Server
QL 4222: Floppy Disk Drive
7 LPT 1
8 Real Time Clock
9 VGA
10 Interrupt from File Server
11 Not Used
12 PS/2 Mouse Interrupt
13 Numeric Coprocessor Interrupt
14 IDE Hard Disk Drive
15 Not Used
  

DMA Channels

QL 3222

No DMA channels are used by the QL 3222.

QL 4222

DMA channel 2 is used by the floppy disk controller on the QL 4222.


QL 3222 Series Memory Map

00000 - 9FFFF System Conventional Memory
A0000 - BFFFF VGA Video memory
C0000 - C7FFF VGA Video Bios copied to shadow RAM
C8000 - CBFFF Diskless download code
CC000 - EDFFF Available
EE000 - EFFFF 8K Dual-port-RAM
F0000 - FFFFF AMI system BIOS copied to shadow RAM
  

This document, and all Web contents, Copyright © 1997 by Cubix Corp., Carson City, NV, USA.